DUBLIN, July 24, 2015 /PRNewswire/ -- Research and Markets (http://www.researchandmarkets.com/research/qrp6gw/sitime_sit1552) has announced the addition of the "SiTime SiT1552 - MEMS Oscillator - Reverse Costing Analysis" report to their offering.
SiTime presents its first MEMS oscillator assembled in Wafer Level Chip Scale package to get the word smallest (1.2mm2) ultra-low power oscillator for consumer and industrial applications.
SiTime is taking fully benefit of all semiconductor manufacturing processes and infrastructures in order to develop a really compact device and compete with quarts solutions for the same application.
This full Reverse Costing analysis has been conducted to provide insight on technology data, manufacturing cost and selling price of the SiTime SiT1552 low-power 32kHz Temperature Compensated Crystal Oscillator.
The report includes comparisons with SiT8002 Oscillator and with the Dicera DSC8002 and Silicon Lab Si504 Oscillators.
SiTime SiT1512 uses an innovative 1.55×0.85 mm Wafer Level Chip Scale Packaging containing two stacked dies: a MEMS oscillator and an ASIC for signal conditioning. The MEMS oscillator is flipped and connected to the ASIC by solder bumps. The component is protected by a polymeric coating and electrically connected by solder balls. For this new generation oscillator, SiTime has integrated many new technologies in order to be competitive to quartz devices.
The MEMS oscillator is manufactured on SOI wafer using MEMSFirstTM and EpiSealTM processes licensed by Robert Bosch GmbH.
Key Topics Covered:
1. Overview / Introduction
2. SiTime Corporation Company Profile
3. Physical Analysis
- Physical Analysis Methodology - Package - Package View & Dimensions - Package Opening - Package Cross-Section - ASIC Die - Dimensions & Markings - Delayering - ASIC Process - ASIC Cross-Section - Process characteristics - MEMS Die - Dimensions & Markings - Active area - Die Cross-Section - Process characteristics
- SiT1552 vs SiT8002
- Dicera's vs SiLab's vs SiTime's MEMS Oscillator
5. Manufacturing Process Flow - Global Overview - ASIC Front-End Process - ASIC Fabrication Unit - MEMS oscillator Process Flow - MEMS Fabrication Unit - Packaging Process Flow - Packaging Assembly Unit
6. Cost Analysis
- Synthesis of the cost analysis
- Main steps of economic analysis
- Yields Hypotheses
- ASIC Front-End Cost
- MEMS Front-End Cost
- MEMS Probe Test & Dicing Cost
- MEMS Wafer & Die Cost
- ASIC & MEMS WLP Cost
- Final WLP Cost
- Back-End : Final Test & Dicing Cost
- Wafer Cost
- SiT1552 Component Cost
- Estimated Selling Price
For more information visit
Laura Wood, +353-1-481-1716, email@example.com
SOURCE Research and Markets