SEEQC and the NQCC Announce First Digital Interface System for Scalable Quantum Error Correction in Collaboration with NVIDIA

OXFORD, England, Sept. 18, 2025 /PRNewswire/ -- SEEQC and National Quantum Computing Centre (NQCC) in collaboration with NVIDIA demonstrated the first digital interface system with supercomputing hardware, a critical milestone in their collaboration to deliver technology to support scalable Quantum Error Correction for the entire ecosystem.

This breakthrough system meets the formidable throughput demand of quantum computers by combining SEEQC's fully digital quantum-classical interface architecture with the world's most advanced accelerated computing platform, powered by decoders from the GPU-accelerated NVIDIA CUDA-Q platform.

Qubits, the building blocks of quantum information, are inherently fragile and prone to interference. As large-scale quantum computational systems develop, this interference must be managed through error-correction. For large scale fault tolerant quantum computers to be useful, this error-correction must be performed in parallel with the computation itself. This requires efficient decoding and processing of vast quantities of data extremely quickly.

"The low latency and throughput efficiency of our new interface system unlocks the enormous power of quantum computing and GPUs," said John Levy, CEO of SEEQC. "This energy efficiency will enable scalable, quantum-enhanced AI and will pave the way for truly heterogeneous computing without requiring a nuclear power station."

Hosted at the NQCC, the system benefits from direct integration with cutting-edge High Performance Computing (HPC) resources, part of a suite of state-of-the-art quantum-classical infrastructure at the NQCC.

This system will enable ultra low latency interfacing between quantum processors (QPUs) and GPUs, enabling real-time QEC. By hosting at the NQCC, SEEQC will be able to showcase its broad compatibility with a diverse set of quantum computing architectures. The co-location of quantum and HPC resources with this critical scaling technology uniquely positions the UK as a leader in delivering quantum computers for both science and industry.

"The integration of HPC and quantum computing is essential for realising practical, scalable quantum error correction," said Michael Cuthbert, Director at NQCC. "Being part of this pioneering collaboration, we are able to leverage UK leadership in quantum computation as well as enhancing our strong collaborations with US partners."

Competing analogue interface systems may dictate useful quantum computers needing enormous data-centre scale HPC infrastructure — potentially consuming megawatts of power for a single quantum computer. By contrast, SEEQC's all digital interface system achieves up to 1,000× more efficient data throughput from QPU to GPU, slashing terabits down to manageable gigabits per second without performance loss which will enable faster and more energy efficient quantum computing at scale.

The all digital interface system is purpose-built for quantum supported AI workloads, where the fusion of GPU compute power and quantum scaling is vital. Decoders from the NVIDIA CUDA-Q platform match perfectly with the interface system's data throughput efficiency. The system showcases how the combination of efficient interface and high throughput optimised GPU decoders can handle the enormous amount of data coming off a quantum processor and ensure high performance QEC at scale.

"The decoding algorithms needed to perform quantum error correction are extremely computationally demanding," said Sam Stanwyck, Group Product Manager for quantum computing at NVIDIA. "Tightly integrating quantum processors alongside state-of-the-art AI supercomputing is the key to cracking the challenge of decoding, and our work with SEEQC is bringing us one step closer to fully integrated quantum-classical systems." 

This system delivery builds on SEEQC's previously announced digital quantum–classical interface protocol demo— unveiled during NVIDIA Quantum Day at GTC — and is underpinned by the company's digital quantum computing-on-a-chip architecture, powered by ultra-fast and energy efficient Single Flux Quantum (SFQ) logic technology to deliver an interface system that can tightly integrate within the core of leading quantum processors.

The result: an industry-first system demonstration that marks a decisive step toward scalable, heterogeneous computing that merges the best of quantum and classical worlds.

About SEEQC
SEEQC designs and manufactures superconducting digital chips, firmware, and software for scalable, energy-efficient quantum computing systems based on its proprietary Single Flux Quantum (SFQ) chips produced at the company's multi-layer superconductive electronics chip foundry located in Elmsford, NY. This chip-based architecture is designed to increase performance while reducing quantum requirements, complexity, cost, and latency. SEEQC's chip-based solution is augmented by the company's PRISM firmware and software that supports a full spectrum of applications for third-party developers.

SEEQC integrates its chip-based solution with GPU and CPU data centers and offers its solution to all quantum computing systems developers including all quantum modalities. SEEQC is based in Elmsford, NY with teams in London, UK, and Naples, Italy.

For more information, visit seeqc.com

Media contact:
Paradox Public Relations
Davis Richardson, President, dr@paradoxpr.com

About the NQCC
The NQCC is the UK's national lab for quantum computing, dedicated to accelerating the development of quantum computing by addressing the challenges of scaling up the technology. The centre is working with businesses, government, and the research community to deliver quantum computing capabilities for the UK and support the growth of the emerging industry.

The NQCC's programme is being delivered jointly by UKRI's research councils, EPSRC and STFC. It is a part of the National Quantum Technologies Programme (NQTP) to develop and deliver quantum technologies across the areas of sensing, timing, imaging, communications and computing.

The centre is headquartered in a purpose-built facility on STFC's Rutherford Appleton Laboratory site at the Harwell Campus in Oxfordshire.

Visit nqcc.ac.uk for more information.

Media contact:
Soma Deshprabhu, Communications Manager, NQCC
soma.deshprabhu@stfc.ac.uk