Alcor Micro to Showcase Latest Arm-based CPU Platform "Mobius100 (CSS V3)" at OCP Global Summit 2025

SAN JOSE, Calif., Oct. 14, 2025 /PRNewswire/ -- Alcor Micro (8054.TWO), a subsidiary of Egis Technology Inc. (6462.TWO), will participate in the Open Compute Project (OCP) Global Summit 2025 held in San Jose, California, to showcase its latest Arm-based CPU platform — Mobius100 (CSS V3). The 8-core emulation platform is purpose-built for Artificial Intelligence (AI) and High-Performance Computing (HPC) servers, demonstrating Alcor Micro's leadership in open computing innovation and advanced chip architecture.

Collaborative Innovation in the Arm Ecosystem

The on-site demonstration will highlight the collaboration and innovation within the Arm ecosystem. In partnership with Cadence and Jmem Tek, Alcor Micro jointly unveils a revolutionary Digital Twin Design Platform — the Arm CSS V3 8-Core Emulation Platform. This platform redefines the architecture, design flow, and standards of next-generation chip development, accelerating heterogeneous chip integration and system-level innovation. Through deepened collaboration across the Arm ecosystem, the partners are paving the way for a new era of open computing.

Pioneering the Future of CPU Design: Heterogeneous Computing and Chiplet Architecture

Alcor Micro adopts the latest Arm CSS V3 EAC2 architecture, which supports CPU die-to-CPU die interconnect as a computation control hub and enables flexible connectivity with GPUs, NPUs, and various AI accelerator dies for true heterogeneous computing integration. This design enhances overall system performance and scalability, establishing a robust foundation for future AI and HPC applications. Leveraging the power-efficient architecture of Arm CPUs, Alcor Micro achieves outstanding performance-per-watt efficiency, delivering exceptional computational capability within limited power budgets. This optimization meets the growing demands of AI and data center workloads while supporting global goals for energy efficiency and sustainability.

PUF-based PQC Solution for Quantum-Safe and Trusted On-Chip Computing

To further strengthen chip-level security and enable trusted computing, Alcor Micro has collaborated with Jmem Tek to develop a PUF-based PQC (Post-Quantum Cryptography) solution.

The solution has obtained multiple international certifications, including NIST FIPS 140-3 CAVP, FIPS 203 (ML-KEM), and FIPS 204 (ML-DSA), and fully supports the latest ASCON algorithm, compliant with the SP 800-232 standard. With native hardware acceleration and a low-latency architecture, this technology provides high-speed and energy-efficient quantum-safe protection directly at the chip level, effectively defending against emerging quantum decryption threats and enabling secure and trustworthy on-chip computing.

Empowering the Arm Ecosystem through Total Design Collaboration

As a key member of the Arm Total Design Partner network in the Design Service category, Alcor Micro possesses extensive experience in Arm-based CSS CPU platform design and integration.

The newly developed Mobius100 CPU will play a pivotal role within the Arm CSA ecosystem, providing flexible and cost-effective Arm-based CSS CPU chiplet solutions for the AI and HPC server markets.

"AI workloads are pushing the boundaries of what traditional SoC design can deliver, and the industry is under pressure to scale more efficiently," said Eddie Ramirez, vice president of go-to-market, Infrastructure Business, Arm. "Alcor Micro's Mobius100 CPU, built on Neoverse CSS and developed through the Arm Total Design ecosystem, shows how a chiplet-based approach can accelerate innovation and time to market."

By combining Alcor Micro's advanced packaging design expertise with chiplet-based modular architecture, the Arm-based CSS CPU chiplet achieves high integration flexibility and reusability at the package level, accelerating system-level innovation based on chiplet architecture and fueling the future of open computing.

Event Information

Event: OCP Global Summit 2025
Date: October 13–16, 2025
Location: San Jose Convention Center, California, USA
Exhibit Zone: Innovation Village Zone